Field of the Invention
The invention relates to a semiconductor configuration and a method for its production.
Field plate insulating transistors are semiconductor configurations that serve the purpose of mutual insulation of two adjacent cells in a substrate which are doped with dopant atoms of complementary types. They can be provided as an alternative to so-called LOCOS insulators. The insulating transistors are intended to prevent the occurrence of parasitic MOS transistors between the wells. To that end, the insulating transistors are disposed between the wells and, above the substrate, over a thin gate oxide, they have a so-called field plate, which includes a dopable layer and extends partway over both wells. Regions of the field plate that are located above one of the wells are doped with charge carriers of the same type as the particular wells located below and have the same potential as that well. In order to insulate the field plate from conductor tracks extending above it, the insulating transistors have a thick field oxide layer above the field plate.
The production of a field plate insulating transistor can be carried out in such a way that first the wells are made in the substrate, and then the necessary layers for producing the insulating transistor are formed.
German Published, Non-Prosecuted Patent Application DE 195 26 568 A1 describes a method for producing a field plate insulating transistor in which the doping of a well and of the corresponding field plate region is carried out in one step. The dopant concentration of that field plate region is then equivalent to that of the well located beneath and therefore is relatively slight, so that the field plate can be made in one piece. The aforementioned application describes the fact that to produce the field plate insulating transistor, the gate oxide layer, the field plate layer and the field oxide layer are first applied and then subsequently structured. At the same time one of the wells and the field plate region located above it are doped over that, by ion implantation. The well regions located below the insulating transistor are doped through the field oxide layer. That method therefore has the disadvantage of requiring very high energies to carry out the implantation doping, in order to achieve adequately deep doping of the wells even below the field plate (and therefore underneath the thick field oxide layer). However, an adequate well depth is necessary to prevent the electric strength of the configuration from being too slight.